Janus MoSSe monolayer achieves ultrafast charge trapping in 2D flash memory


Mar 18, 2026

A Janus MoSSe monolayer serves as a charge-trapping layer in 2D flash memory, achieving ultrafast programming, long data retention, and neuromorphic computing capability.

(Nanowerk News) A team of researchers in South Korea has demonstrated that a single layer of Janus MoSSe can serve as a highly effective charge-trapping layer in two-dimensional flash memory. The work, published in Nano-Micro Letters (“Dipole-Driven Charge Trapping in Monolayer Janus MoSSe for Ultrathin Nonvolatile Memory Devices”), achieves ultrafast programming speeds, data retention times exceeding 108 seconds, and neuromorphic computing capability in a single device architecture.

Key Findings

  • The Janus MoSSe-based floating-gate memory achieved charge-trapping rates of up to 8.96×1014 cm⁻²s⁻¹, enabling high-speed program and erase operations.
  • An intrinsic out-of-plane dipole moment in the Janus layer produced stable data retention exceeding 108 seconds by creating deeper trapping states and stronger charge confinement.
  • The devices also showed synaptic behavior suitable for neuromorphic computing, reaching 94.27% recognition accuracy in artificial neural network simulations.
The study was led by Professor Min Sup Choi of Chungnam National University and Professor Hyun Ho Kim of Gwangju Institute of Science and Technology, with contributions from researchers at Kumoh National Institute of Technology. Their approach uses Janus MoSSe, a transition metal dichalcogenide in which the two chalcogen layers differ, with sulfur atoms on one face and selenium on the other. This broken mirror symmetry generates a permanent vertical dipole moment that is absent in conventional symmetric materials such as MoS₂. The dipole plays a central role in the memory mechanism. It suppresses leakage current through the tunneling barrier and widens the voltage window over which the device can reliably switch between stored states. These two effects together allow the device to trap charge quickly and hold it for long periods, even when the tunneling barrier is made very thin. The device uses a vertically stacked structure of multilayer graphene, MoS₂, hexagonal boron nitride (h-BN), and the Janus MoSSe monolayer. The architecture integrates these layers through van der Waals bonding, ensuring clean interfaces and precise electrostatic control across the stack. Dipole‑Driven Charge Trapping in Monolayer Janus MoSSe for Ultrathin Nonvolatile Memory Devices Graphical abstract of the work. (Image: Reproduced from DOI:10.1007/s40820-026-02078-y, CC BY) A systematic study of h-BN tunneling barrier thickness, varied from 4 to 16 nm, revealed that a 6 nm layer produced the largest memory window relative to the applied gate voltage, reaching a ratio of 70%. At this thickness, the built-in dipole field assists charge injection from the MoS₂ channel into the MoSSe trapping layer while simultaneously blocking back-tunneling that would erase the stored information. Even at a slightly thicker 10 nm h-BN barrier, the absolute memory window reached approximately 80 V. The authors describe this as among the highest values reported for two-dimensional floating-gate memories, positioning the technology for next-generation ultrathin and flexible nonvolatile memory applications. Density functional theory calculations confirmed the physical picture behind the experimental results. The simulations showed that electrons injected into the Janus MoSSe monolayer localize preferentially at the selenium sites, where the charge-dipole interaction is strongest. This selective localization deepens the potential well that holds the stored charge, explaining the unusually long retention times. Beyond binary data storage, the devices exhibited analog synaptic characteristics relevant to neuromorphic computing. Paired-pulse facilitation, long-term potentiation, and long-term depression were all demonstrated experimentally. When the synaptic weight behavior was incorporated into simulated convolutional neural networks, the system achieved a recognition accuracy of 94.27%. The multi-level storage capability further extends the practical relevance of the architecture. Because the charge-trapping response varies smoothly with programming pulse parameters, the device can encode more than one bit per cell. Combined with the analog synaptic response, this enables implementation of artificial neural networks, convolutional neural networks, and advanced neuromorphic computing systems. The fabrication approach is compatible with wafer-scale single-crystal growth methods and room-temperature plasma substitution techniques already demonstrated for Janus materials. However, the authors note that current Janus MoSSe synthesis still relies on manual fabrication steps that limit large-area uniformity. Future efforts will target automated transfer processes and alternative tunneling dielectrics, including aluminum oxide and hafnium oxide deposited by atomic layer deposition, to move the technology closer to commercial production. The work demonstrates that the asymmetric dipolar properties of a single Janus monolayer can simultaneously deliver fast programming, long retention, low operating voltage, and synaptic functionality, capabilities that have typically required trade-offs or more complex device designs in earlier two-dimensional memory architectures.

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