| Feb 11, 2026 |
Carbon nanotube sandpaper polishes semiconductor surfaces down to a few atoms, reducing defects by 67% and eliminating chemical slurry waste.
(Nanowerk News) The performance and stability of smartphones and artificial intelligence (AI) services depend on how uniformly and precisely semiconductor surfaces are processed. KAIST researchers have expanded the concept of everyday “sandpaper” into the realm of nanotechnology, developing a new technique capable of processing semiconductor surfaces uniformly down to the atomic level. This technology demonstrates the potential to significantly improve surface quality and processing precision in advanced semiconductor processes such as high-bandwidth memory (HBM).
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KAIST announced that a research team led by Professor Sanha Kim of the Department of Mechanical Engineering has developed a “nano sandpaper” that utilizes carbon nanotubes as abrasive materials. This technology enables more precise surface processing than existing semiconductor manufacturing processes, while also reducing environmental burdens generated during fabrication, presenting a new planarization technique.
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The findings are published in Advanced Composites and Hybrid Materials (“Carbon nanotube sandpaper for atomic-precision surface finishing”).
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| VACNT-based nano sandpaper for ultraprecision polishing. a Schematic of conventional fixed-abrasive sandpaper with large, uneven particles loosely adhered to a backing sheet, leading to µm-scale surface roughness and particle detachment. b Schematic of loose-abrasive polishing using slurry and porous pads, enabling nm-scale finishing but causing particle agglomeration, contamination, and requiring post-cleaning. c Schematic of VACNT nano sandpaper with uniformly aligned CNTs (≥4 nm diameter) embedded in a polyurethane matrix, enabling consistent nanoscale polishing without particle detachment and supporting eco-friendly, particle-free operation. d Photograph of VACNT nano sandpaper (scale bar: 1 cm). Scanning electron microscopy (SEM) images of the surface e at micro- (scale bar: 100 μm) and f nano-scale (scale bar: 1 μm). g Cross-sectional SEM image showing VACNTs stably anchored in the matrix with slight surface protrusion (scale bar: 250 nm). All SEM images were measured after a 7 nm platinum coating. h A transmission electron microscopy (TEM) image of a multi-walled CNT with a diameter of approximately 4 nm (scale bar: 4 nm). i Schematic of mechanical abrasion using exposed VACNTs as fixed nano-abrasives. j Atomic force microscopy (AFM) images showing the reduction in root mean square (RMS) surface roughness of a rough copper (Cu) surface from 19.5 ± 0.9 nm (n = 3, where n represents the number of measurements for statistical analysis) to 2.3 ± 0.1 nm (n = 3) after polishing with VACNT nano sandpaper using a 2-axis rotational tool (scale bar: 4 μm; height: -100 nm to 100 nm). k Comparison of ultimate tensile strength of CNTs, exceeding conventional abrasives (alumina, quartz, diamond, silicon carbide) by more than 10-fold. (Image: Reproduced from DOI:10.1007/s42114-025-01608-3, CC BY) (click on image to enlarge)
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Although sandpaper is a familiar tool used to smooth surfaces by rubbing, it has been difficult to apply it to fields such as semiconductors, where extremely precise surface processing is required. This limitation arises because conventional sandpaper is manufactured by attaching abrasive particles with adhesives, making it difficult to uniformly secure extremely fine particles.
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To overcome such limitations, the semiconductor industry has adopted a planarization process known as chemical mechanical polishing (CMP), which uses a chemical slurry in which abrasive particles are dispersed in liquid. However, this method requires additional cleaning steps and generates large amounts of waste, making the process complex and environmentally burdensome.
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To address these issues, the research team extended the concept of sandpaper to the nanoscale. By vertically aligning carbon nanotubes, fixing them inside polyurethane, and partially exposing them on the surface, they implemented a “nano sandpaper.” This structure structurally suppresses abrasive detachment, eliminating concerns about surface damage and maintaining stable performance even after repeated use.
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The nano sandpaper developed in this study achieves an abrasive density approximately 500,000 times higher than that of the finest commercially available sandpaper. The precision of sandpaper is expressed in terms of “abrasive density (grit number),” which indicates how densely abrasive particles are arranged on the surface.
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While everyday sandpaper typically ranges from 40 to 3000 grit, the nano sandpaper exceeds 1,000,000,000 grit. Through this extremely dense structure, surfaces could be processed with precision down to several nanometers—equivalent to the thickness of only a few atoms.
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The effectiveness of the nano sandpaper was confirmed through experiments. Rough copper surfaces were polished to a smoothness at the nanometer level, and in semiconductor pattern planarization experiments, the technique reduced dishing defects by up to 67% compared with conventional CMP processes. Dishing defects refer to the phenomenon in which the center of interconnect lines becomes recessed, a major defect affecting the performance and reliability of advanced semiconductors such as HBM.
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In particular, because the abrasive materials are fixed on the sandpaper surface, the technology does not require continuous supply of slurry solutions as in conventional processes. This reduces cleaning steps and eliminates waste slurry, presenting the possibility of transitioning semiconductor manufacturing toward more environmentally friendly processes.
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The research team expects that this technology can be applied to advanced semiconductor planarization processes such as HBM used in AI servers, as well as to hybrid bonding processes, which are gaining attention as next-generation semiconductor interconnection technologies. The study is also significant in that it expands the everyday concept of sandpaper into nano-precision processing technology, suggesting the possibility of securing core technologies required for semiconductor manufacturing.
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Professor Sanha Kim stated, “This is an original study demonstrating that the everyday concept of sandpaper can be extended to the nanoscale and applied to ultra-fine semiconductor manufacturing,” adding, “We hope this technology will lead not only to improved semiconductor performance but also to environmentally friendly manufacturing processes.”
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